Optimizing Bi-layer Lift-off Resist Processes for Insulator Films
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ABSTRACT
The bi-layer lift-off method has been used successfully to commercially fabricate many structures including source, drain ohmic contacts, gates and air bridges for use in Gallium Arsenide (GaAs), GaN, InP, MEMS and other semiconductor devices. This structure can be customized because its composition and dimensions can be tailored for a given material-deposition-application system. This is enabling for use in select process applications. This study quantifies the most relevant bi-layer structural features for effective use with the reference metallization film, Aluminum. It builds on these findings to explore the multivariate optimization required to successfully use bi-layer processing with common metal oxide insulators (SiO2 / Al2O3) in isotropically sputter deposited thicknesses. A model is presented that characterizes the key variables. Also, it introduces a new high temperature bi-layer process using a negative imaging resist capable of maintaining stability during higher temperature insulator deposition.